RBS FM 92.60 MHz the Best Radio Station in Tulungagung
Home contact-us site-map
Home arrow Schematics arrow SMPS arrow Switch Mode Power Supply with TL494
Switch Mode Power Supply with TL494
Written by BuSan   
Friday, 13 July 2007

The TL494 is a fixed frequency, pulse width modulation control circuit designed primarily for Switch Mode Power Supply control, incorporating the primary building blocks required for the control of a switching power supply (See Figure 1 .).

TL494 Block_Diagram and Pin Connection
Figure 1. TL494 Block_Diagram and Pin Connection

 

An internal–linear sawtooth oscillator is frequency–rogrammable by two external components, RT and CT.

The approximate oscillator frequency is determined by: TL494 RT CT FormulaFor more information refer to Figure 3 .

 

TL494 Timing Diagram
Figure 2. TL494 Timing Diagram
 

Output pulse width modulation is accomplished by comparison of the positive sawtooth waveform across capacitor CT to either of two control signals. The NOR gates, which drive output transistors Q1 and Q2, are enabled only when the flip–flop clock–input line is in its low state. This happens only during that portion of time when the sawtooth voltage is greater than the control signals. Therefore, an increase in control–signal amplitude causes a corresponding linear decrease of output pulse width. (Refer to the Timing Diagram shown in Figure 2 .).

The control signals are external inputs that can be fed into the deadtime control, the error amplifier inputs, or the feedback input. The deadtime control comparator has an effective 120 mV input offset which limits the minimum output deadtime to approximately the first 4% of the sawtooth–cycle time. This would result in a maximum duty cycle on a given output of 96% with the output control grounded, and 48% with it connected to the reference line. Additional deadtime may be imposed on the output by setting the deadtime–control input to a fixed voltage, ranging between 0 V to 3.3 V.

Functional Table
Input/Output
Controls
Output Function fout/fosc
 Grounded Single–ended PWM @ Q1 and Q2 1.0
 @ Vref Push–pull Operation 0.5

 

The pulse width modulator comparator provides a means for the error amplifiers to adjust the output pulse width from the maximum percent on–time, established by the deadtime control input, down to zero, as the voltage at the feedback pin varies from 0.5 V to 3.5 V. Both error amplifiers have a common mode input range from –0.3 V to (VCC – 2V), and may be used to sense power–supply output voltage and current. The error–amplifier outputs are active high and are ORed together at the noninverting input of the pulse–width  modulator comparator. With this configuration, the amplifier that demands minimum output on time, dominates control of the loop.

When capacitor CT is discharged, a positive pulse is generated on the output of the deadtime comparator, which clocks the pulse–steering flip–flop and inhibits the output transistors, Q1 and Q2. With the output–control connected to the reference line, the pulse–steering flip–flop directs the modulated pulses to each of the two output transistors alternately for push–pull operation. The output frequency is equal to half that of the oscillator. Output drive can also be taken from Q1 or Q2, when single–ended operation with a   maximum on–time of less than 50% is required. This is desirable when the output transformer has a ringback winding with a catch diode used for snubbing. When higher output–drive currents are required for single–ended operation, Q1 and Q2 may be connected in parallel, and the output–mode pin must be tied to ground to disable the flip–flop. The output frequency will now be equal to that of the oscillator.

The TL494 has an internal 5.0 V reference capable of sourcing up to 10 mA of load current for external bias circuits. The reference has an internal accuracy of ±5.0% with a typical thermal drift of less than 50 mV over an operating temperature range of 0° to 70°C.

 

TL494 Oscillator Frequency vs Timing Resistance
Figure 3. TL494 Oscillator Frequency vs Timing Resistance
 
TL494 Error Amplifier Sensing Techniques
Figure 4. TL494 Error Amplifier Sensing Techniques

 

TL494 Step Up SMPS Push Pull Topology
Figure 5. TL494 Step Up SMPS Push Pull Topology

 

Test Conditions  Results
 Line Regulation Vin = 10 V to 40 V 14 mV 0.28%
 Load Regulation Vin = 28 V, IO = 1.0 mA to 1.0 A 3.0 mV 0.06%
 Output Ripple Vin = 28 V, IO = 1.0 A 65 mV pp P.A.R.D.
 Short Circuit Current Vin = 28 V, RL = 0.1 Ω 1.6 A
 Efficiency Vin = 28 V, IO = 1.0 A 71%

L1 – 3.5 mH @ 0.3 A
T1 – Primary: 20T C.T. #28 AWG  Secondary: 12OT C.T. #36 AWG  Core: Ferroxcube 1408P–L00–3CB

 

TL494 Step Down SMPS Buck Topology
Figure 6. TL494 Step Down SMPS Buck Topology

 

 Test Conditions Results
 Line Regulation Vin = 8.0 V to 40 V 3.0 mV 0.01%
 Load Regulation Vin = 12.6 V, IO = 0.2 mA to 200 mA 5.0 mV 0.02%
 Output Ripple Vin = 12.6 V, IO = 200 mA 40 mV pp P.A.R.D.
 Short Circuit Current Vin = 12.6 V, RL = 0.1 Ω 250 mA
 Efficiency Vin = 12.6 V, IO = 200 mA 72%
 
Next >

Login Form






Lost Password?
No account yet? Register

Syndicate

Who's Online

We have 9 guests online

Template Chooser

my_radio1
Top